Submitted by jussulent_tummy t3_z520en in worldnews
Greedyanda t1_ixu50el wrote
Reply to comment by Jamus- in Taiwan's TSMC founder says 3nm fab will be built in US by jussulent_tummy
This isn't actually the size. TSMC has changed their naming conventions years ago and the market has followed.
atlusblue t1_ixub7du wrote
So how does it work or what is the scheme name?
Shuber-Fuber t1_ixue0yj wrote
Basically, "3nm" doesn't refer to actual feature size anymore. It just means that there's an improvement from previous "x-nm" gen (maybe better density, smaller leakage current, faster gate speed, etc).
Because ultimately, it's performance. If you can keep the same size but, say, reduce the gate switching time by half, you functionally just have twice the performance for a given number of transistors.
poqpoq t1_ixv36gf wrote
So at some point with this convention will we use negative nm? Or will we just drop to 0.9nm 0.8nm etc?
jared555 t1_ixv9zzo wrote
Picometers would be the next logical step which means they probably won't use it.
poqpoq t1_ixvc3n0 wrote
Yeah that was why I was wondering about stuff like 0.9nm. Pm won’t be recognizable to consumers and consumers will be confused that it’s a larger number.
glamdivitionen t1_ixwkbau wrote
Nah, we'll probably leave meters altogether and switch to Ångströms pretty soon.
YourDevilAdvocate t1_ixv3e6a wrote
I'm thinking alphanumerical
2nmA. 2nmb etc...
Lurker_Since_Forever t1_ixwu28x wrote
It's based on transistor density. Something that is twice as dense is sqrt(2) times smaller feature size. So doubling transistor density down from 10 is 10 -> 7 -> 5 -> 3 -> 2 -> measuring it in angstroms or picometers.
WolfResponsible8483 t1_ixvf1lc wrote
Intel has dropped the "nm" completely. Their 10nm was rename to Intel 7 - it was very similar to TSMC 7nm anyway. Upcoming nodes are named Intel 4 and Intel 3.
babbler-dabbler t1_ixvkidt wrote
So inflation applies to semiconductor trace sizes too.
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